disable the BAR by setting it to some
impossible address, i.e., something outside both the upstream and
downstream bridge windows so memory accesses could never be routed to
it?[PATCH 1/2] PCI: Release BAR0 of an integrated bridge to allow GPU BAR resizeBjorn Helgaas <helgaas@kernel.org> undefinedLucas De Marchi <lucas.demarchi@intel.com> undefined undefined undefined undefined undefined undefined undefined undefined undefined undefined undefined undefined undefined”