ulo Zanoni <paulo.r.zanoni@intel.com> 1349449554 -0300
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1349876896 +0200

drm/i915: enable and disable PIPE_CLK_SEL at the right time

Previously we were enabling it at mode_set but never disabling. Let's
follow the mode set sequence.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>