eff Kirsher <jeffrey.t.kirsher@intel.com> 1332147276 -0700

ixgbe: Update layout of ixgbe_ring structure to improve cache performance

This change makes it so that only the 2nd cache line in the ring structure
should see frequent updates.  The advantage to this is that it should
reduce the amount of cross CPU cache bouncing since only the 2nd cache line
will be changing between most network transactions.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Stephen Ko <stephen.s.ko@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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