371e6be3b6d6bde2e38b8cade076
author Jon Mason <mason@myri.com> 1318622174 -0500
committer Jesse Barnes <jbarnes@virtuousgeek.org> 1319744743 -0700

PCI: enable MPS "performance" setting to properly handle bridge MPS

Rework the "performance" MPS option to configure the device MPS with the
smaller of the device MPSS or the bridge MPS (which is assumed to be
properly configured at this point to the largest allowable MPS based on
its parent bus).

Also, rework the MRRS setting to report an inability to set the MRRS to
a valid setting.

Signed-off-by: Jon Mason <mason@myri.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
H