t mask for AR_ISR_RXMINTR or AR_ISR_RXINTM, as those interrupts will be masked out if rx interrupt mitigation is disabled. Avoid reading AR_ISR_S5_S twice by reordering the code to be more concise. Signed-off-by: Felix Fietkau Signed-off-by: John W. Linville ¿L߉—6x