33f4ad4f02 author Sujith 1268816122 +0530 committer John W. Linville 1269377416 -0400 ath9k_hw: always set the core clock for AR9271 When initializing the PLL on AR9271 we always need to set the core clock to 117MHz. While at it remove the baud rate settings for the serial device on the AR9271, the default settings work well unless you want to customize it. Signed-off-by: Sujith Signed-off-by: Vasanthakumar Thiagarajan Signed-off-by: Luis R. Rodriguez Signed-off-by: John W. Linville ^