0f3862ae338a4c533f4bb5a863f9a
author Borislav Petkov <borislav.petkov@amd.com> 1255715749 +0200
committer Borislav Petkov <borislav.petkov@amd.com> 1260209669 +0100

amd64_edac: cleanup f10_early_channel_count

Do not read DCLR[01] again since this is done in
amd64_read_mc_registers() earlier. There can be more than two physical
DIMMs present so clamp the channels value to max 2. Also, do not report
DCT data width - it is also done earlier.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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