ring chip.

While the vendor should have wired the pin (or, failing that, should
have hardwired it to level high rather than low), the fact is that
none of these processors are currently known to operate at the lower
voltage levels which require the 6th VID pin. So, as a practical
workaround, I propose to ignore the 6th VID pin for these CPUs.

If this decision ever causes problems, we'll reconsider.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Frank Myhr <fmyhr@fhmtech.com>
Tested-by: Hleb Valoshka <375gnu@gmail.com>
Cc: Rudolf Marek <r.marek@assembler.cz>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
$¨YÄš