ebd09fbf4e7f9f5e81e479685930c180eaece76 parent e0614db2a398d4d0dc5fb47fe2c2783141262a3e author Tejun Heo 1211127310 +0900 committer Jeff Garzik 1211233907 -0400 libata: increase PMP register access timeout to 3s This timeout was set low because previously PMP register access was done via polling and register access timeouts could stack up. This is no longer the case. One timeout will make all following accesses fail immediately. In rare cases both marvell and SIMG PMPs need almost a second. Bump it to 3s. While at it, rename it to SATA_PMP_RW_TIMEOUT. It's not specific to SCR access. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik º