/* * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once #include "esp_types.h" #include "esp_err.h" #include "freertos/FreeRTOS.h" #include "freertos/semphr.h" #include "soc/i2s_periph.h" #include "soc/rtc_periph.h" #include "soc/soc_caps.h" #include "hal/i2s_types.h" #include "driver/periph_ctrl.h" #include "esp_intr_alloc.h" #if SOC_I2S_SUPPORTS_ADC #include "driver/adc.h" #endif #ifdef __cplusplus extern "C" { #endif #define I2S_PIN_NO_CHANGE (-1) /*!< Use in i2s_pin_config_t for pins which should not be changed */ /** * @brief I2S port number, the max port number is (I2S_NUM_MAX -1). */ typedef enum { I2S_NUM_0 = 0, /*!< I2S port 0 */ #if SOC_I2S_NUM > 1 I2S_NUM_1 = 1, /*!< I2S port 1 */ #endif I2S_NUM_MAX, /*!< I2S port max */ } i2s_port_t; #if SOC_I2S_SUPPORTS_PCM /** * @brief I2S PCM configuration * */ typedef struct { i2s_pcm_compress_t pcm_type; /*!< I2S PCM a/u-law decompress or compress type */ } i2s_pcm_cfg_t; #endif #if SOC_I2S_SUPPORTS_PDM_TX /** * @brief Default I2S PDM Up-Sampling Rate configuration */ #define I2S_PDM_DEFAULT_UPSAMPLE_CONFIG(rate) { \ .sample_rate = rate, \ .fp = 960, \ .fs = (rate) / 100, \ } /** * @brief I2S PDM up-sample rate configuration * @note TX PDM can only be set to the following two upsampling rate configurations: * 1: fp = 960, fs = sample_rate / 100, in this case, Fpdm = 128*48000 * 2: fp = 960, fs = 480, in this case, Fpdm = 128*Fpcm = 128*sample_rate * If the pdm receiver do not care the pdm serial clock, it's recommended set Fpdm = 128*48000. * Otherwise, the second configuration should be applied. */ typedef struct { int sample_rate; /*!< I2S PDM sample rate */ int fp; /*!< I2S PDM TX upsampling paramater. Normally it should be set to 960 */ int fs; /*!< I2S PDM TX upsampling paramater. When it is set to 480, the pdm clock frequency Fpdm = 128 * sample_rate, when it is set to sample_rate / 100, Fpdm will be fixed to 128*48000 */ } i2s_pdm_tx_upsample_cfg_t; #endif /** * @brief I2S pin number for i2s_set_pin * */ typedef struct { int mck_io_num; /*!< MCK in out pin*/ int bck_io_num; /*!< BCK in out pin*/ int ws_io_num; /*!< WS in out pin*/ int data_out_num; /*!< DATA out pin*/ int data_in_num; /*!< DATA in pin*/ } i2s_pin_config_t; /** * @brief I2S driver configuration parameters * */ typedef struct { i2s_mode_t mode; /*!< I2S work mode */ uint32_t sample_rate; /*!< I2S sample rate */ i2s_bits_per_sample_t bits_per_sample; /*!< I2S sample bits in one channel */ i2s_channel_fmt_t channel_format; /*!< I2S channel format.*/ i2s_comm_format_t communication_format; /*!< I2S communication format */ int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */ int dma_buf_count; /*!< I2S DMA Buffer Count */ int dma_buf_len; /*!< I2S DMA Buffer Length */ bool use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */ bool tx_desc_auto_clear; /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */ int fixed_mclk; /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */ i2s_mclk_multiple_t mclk_multiple; /*!< The multiple of I2S master clock(MCLK) to sample rate */ i2s_bits_per_chan_t bits_per_chan; /*!< I2S total bits in one channel, only take effect when larger than 'bits_per_sample', default '0' means equal to 'bits_per_sample' */ #if SOC_I2S_SUPPORTS_TDM i2s_channel_t chan_mask; /*!< I2S active channel bit mask, set value in `i2s_channel_t` to enable specific channel, the bit map of active channel can not exceed (0x1<