# 0 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/aesni-gcm-x86_64-elf.S" # 1 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14//" # 0 "" #define __STDC__ 1 # 0 "" #define __ASSEMBLER__ 1 # 0 "" #define __STDC_HOSTED__ 1 # 0 "" #define __GNUC__ 12 # 0 "" #define __GNUC_MINOR__ 2 # 0 "" #define __GNUC_PATCHLEVEL__ 0 # 0 "" #define __VERSION__ "12.2.0" # 0 "" #define __ATOMIC_RELAXED 0 # 0 "" #define __ATOMIC_SEQ_CST 5 # 0 "" #define __ATOMIC_ACQUIRE 2 # 0 "" #define __ATOMIC_RELEASE 3 # 0 "" #define __ATOMIC_ACQ_REL 4 # 0 "" #define __ATOMIC_CONSUME 1 # 0 "" #define __pic__ 2 # 0 "" #define __PIC__ 2 # 0 "" #define __OPTIMIZE__ 1 # 0 "" #define __FINITE_MATH_ONLY__ 0 # 0 "" #define _LP64 1 # 0 "" #define __LP64__ 1 # 0 "" #define __SIZEOF_INT__ 4 # 0 "" #define __SIZEOF_LONG__ 8 # 0 "" #define __SIZEOF_LONG_LONG__ 8 # 0 "" #define __SIZEOF_SHORT__ 2 # 0 "" #define __SIZEOF_FLOAT__ 4 # 0 "" #define __SIZEOF_DOUBLE__ 8 # 0 "" #define __SIZEOF_LONG_DOUBLE__ 16 # 0 "" #define __SIZEOF_SIZE_T__ 8 # 0 "" #define __CHAR_BIT__ 8 # 0 "" #define __BIGGEST_ALIGNMENT__ 16 # 0 "" #define __ORDER_LITTLE_ENDIAN__ 1234 # 0 "" #define __ORDER_BIG_ENDIAN__ 4321 # 0 "" #define __ORDER_PDP_ENDIAN__ 3412 # 0 "" #define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__ # 0 "" #define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__ # 0 "" #define __SIZEOF_POINTER__ 8 # 0 "" #define __GNUC_EXECUTION_CHARSET_NAME "UTF-8" # 0 "" #define __GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE" # 0 "" #define __SIZE_TYPE__ long unsigned int # 0 "" #define __PTRDIFF_TYPE__ long int # 0 "" #define __WCHAR_TYPE__ int # 0 "" #define __WINT_TYPE__ unsigned int # 0 "" #define __INTMAX_TYPE__ long int # 0 "" #define __UINTMAX_TYPE__ long unsigned int # 0 "" #define __CHAR16_TYPE__ short unsigned int # 0 "" #define __CHAR32_TYPE__ unsigned int # 0 "" #define __SIG_ATOMIC_TYPE__ int # 0 "" #define __INT8_TYPE__ signed char # 0 "" #define __INT16_TYPE__ short int # 0 "" #define __INT32_TYPE__ int # 0 "" #define __INT64_TYPE__ long int # 0 "" #define __UINT8_TYPE__ unsigned char # 0 "" #define __UINT16_TYPE__ short unsigned int # 0 "" #define __UINT32_TYPE__ unsigned int # 0 "" #define __UINT64_TYPE__ long unsigned int # 0 "" #define __INT_LEAST8_TYPE__ signed char # 0 "" #define __INT_LEAST16_TYPE__ short int # 0 "" #define __INT_LEAST32_TYPE__ int # 0 "" #define __INT_LEAST64_TYPE__ long int # 0 "" #define __UINT_LEAST8_TYPE__ unsigned char # 0 "" #define __UINT_LEAST16_TYPE__ short unsigned int # 0 "" #define __UINT_LEAST32_TYPE__ unsigned int # 0 "" #define __UINT_LEAST64_TYPE__ long unsigned int # 0 "" #define __INT_FAST8_TYPE__ signed char # 0 "" #define __INT_FAST16_TYPE__ long int # 0 "" #define __INT_FAST32_TYPE__ long int # 0 "" #define __INT_FAST64_TYPE__ long int # 0 "" #define __UINT_FAST8_TYPE__ unsigned char # 0 "" #define __UINT_FAST16_TYPE__ long unsigned int # 0 "" #define __UINT_FAST32_TYPE__ long unsigned int # 0 "" #define __UINT_FAST64_TYPE__ long unsigned int # 0 "" #define __INTPTR_TYPE__ long int # 0 "" #define __UINTPTR_TYPE__ long unsigned int # 0 "" #define __GXX_ABI_VERSION 1017 # 0 "" #define __SCHAR_MAX__ 0x7f # 0 "" #define __SHRT_MAX__ 0x7fff # 0 "" #define __INT_MAX__ 0x7fffffff # 0 "" #define __LONG_MAX__ 0x7fffffffffffffffL # 0 "" #define __LONG_LONG_MAX__ 0x7fffffffffffffffLL # 0 "" #define __WCHAR_MAX__ 0x7fffffff # 0 "" #define __WCHAR_MIN__ (-__WCHAR_MAX__ - 1) # 0 "" #define __WINT_MAX__ 0xffffffffU # 0 "" #define __WINT_MIN__ 0U # 0 "" #define __PTRDIFF_MAX__ 0x7fffffffffffffffL # 0 "" #define __SIZE_MAX__ 0xffffffffffffffffUL # 0 "" #define __SCHAR_WIDTH__ 8 # 0 "" #define __SHRT_WIDTH__ 16 # 0 "" #define __INT_WIDTH__ 32 # 0 "" #define __LONG_WIDTH__ 64 # 0 "" #define __LONG_LONG_WIDTH__ 64 # 0 "" #define __WCHAR_WIDTH__ 32 # 0 "" #define __WINT_WIDTH__ 32 # 0 "" #define __PTRDIFF_WIDTH__ 64 # 0 "" #define __SIZE_WIDTH__ 64 # 0 "" #define __INTMAX_MAX__ 0x7fffffffffffffffL # 0 "" #define __INTMAX_C(c) c ## L # 0 "" #define __UINTMAX_MAX__ 0xffffffffffffffffUL # 0 "" #define __UINTMAX_C(c) c ## UL # 0 "" #define __INTMAX_WIDTH__ 64 # 0 "" #define __SIG_ATOMIC_MAX__ 0x7fffffff # 0 "" #define __SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1) # 0 "" #define __SIG_ATOMIC_WIDTH__ 32 # 0 "" #define __INT8_MAX__ 0x7f # 0 "" #define __INT16_MAX__ 0x7fff # 0 "" #define __INT32_MAX__ 0x7fffffff # 0 "" #define __INT64_MAX__ 0x7fffffffffffffffL # 0 "" #define __UINT8_MAX__ 0xff # 0 "" #define __UINT16_MAX__ 0xffff # 0 "" #define __UINT32_MAX__ 0xffffffffU # 0 "" #define __UINT64_MAX__ 0xffffffffffffffffUL # 0 "" #define __INT_LEAST8_MAX__ 0x7f # 0 "" #define __INT8_C(c) c # 0 "" #define __INT_LEAST8_WIDTH__ 8 # 0 "" #define __INT_LEAST16_MAX__ 0x7fff # 0 "" #define __INT16_C(c) c # 0 "" #define __INT_LEAST16_WIDTH__ 16 # 0 "" #define __INT_LEAST32_MAX__ 0x7fffffff # 0 "" #define __INT32_C(c) c # 0 "" #define __INT_LEAST32_WIDTH__ 32 # 0 "" #define __INT_LEAST64_MAX__ 0x7fffffffffffffffL # 0 "" #define __INT64_C(c) c ## L # 0 "" #define __INT_LEAST64_WIDTH__ 64 # 0 "" #define __UINT_LEAST8_MAX__ 0xff # 0 "" #define __UINT8_C(c) c # 0 "" #define __UINT_LEAST16_MAX__ 0xffff # 0 "" #define __UINT16_C(c) c # 0 "" #define __UINT_LEAST32_MAX__ 0xffffffffU # 0 "" #define __UINT32_C(c) c ## U # 0 "" #define __UINT_LEAST64_MAX__ 0xffffffffffffffffUL # 0 "" #define __UINT64_C(c) c ## UL # 0 "" #define __INT_FAST8_MAX__ 0x7f # 0 "" #define __INT_FAST8_WIDTH__ 8 # 0 "" #define __INT_FAST16_MAX__ 0x7fffffffffffffffL # 0 "" #define __INT_FAST16_WIDTH__ 64 # 0 "" #define __INT_FAST32_MAX__ 0x7fffffffffffffffL # 0 "" #define __INT_FAST32_WIDTH__ 64 # 0 "" #define __INT_FAST64_MAX__ 0x7fffffffffffffffL # 0 "" #define __INT_FAST64_WIDTH__ 64 # 0 "" #define __UINT_FAST8_MAX__ 0xff # 0 "" #define __UINT_FAST16_MAX__ 0xffffffffffffffffUL # 0 "" #define __UINT_FAST32_MAX__ 0xffffffffffffffffUL # 0 "" #define __UINT_FAST64_MAX__ 0xffffffffffffffffUL # 0 "" #define __INTPTR_MAX__ 0x7fffffffffffffffL # 0 "" #define __INTPTR_WIDTH__ 64 # 0 "" #define __UINTPTR_MAX__ 0xffffffffffffffffUL # 0 "" #define __GCC_IEC_559 2 # 0 "" #define __GCC_IEC_559_COMPLEX 2 # 0 "" #define __FLT_EVAL_METHOD__ 0 # 0 "" #define __FLT_EVAL_METHOD_TS_18661_3__ 0 # 0 "" #define __DEC_EVAL_METHOD__ 2 # 0 "" #define __FLT_RADIX__ 2 # 0 "" #define __FLT_MANT_DIG__ 24 # 0 "" #define __FLT_DIG__ 6 # 0 "" #define __FLT_MIN_EXP__ (-125) # 0 "" #define __FLT_MIN_10_EXP__ (-37) # 0 "" #define __FLT_MAX_EXP__ 128 # 0 "" #define __FLT_MAX_10_EXP__ 38 # 0 "" #define __FLT_DECIMAL_DIG__ 9 # 0 "" #define __FLT_MAX__ 3.40282346638528859811704183484516925e+38F # 0 "" #define __FLT_NORM_MAX__ 3.40282346638528859811704183484516925e+38F # 0 "" #define __FLT_MIN__ 1.17549435082228750796873653722224568e-38F # 0 "" #define __FLT_EPSILON__ 1.19209289550781250000000000000000000e-7F # 0 "" #define __FLT_DENORM_MIN__ 1.40129846432481707092372958328991613e-45F # 0 "" #define __FLT_HAS_DENORM__ 1 # 0 "" #define __FLT_HAS_INFINITY__ 1 # 0 "" #define __FLT_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT_IS_IEC_60559__ 2 # 0 "" #define __DBL_MANT_DIG__ 53 # 0 "" #define __DBL_DIG__ 15 # 0 "" #define __DBL_MIN_EXP__ (-1021) # 0 "" #define __DBL_MIN_10_EXP__ (-307) # 0 "" #define __DBL_MAX_EXP__ 1024 # 0 "" #define __DBL_MAX_10_EXP__ 308 # 0 "" #define __DBL_DECIMAL_DIG__ 17 # 0 "" #define __DBL_MAX__ ((double)1.79769313486231570814527423731704357e+308L) # 0 "" #define __DBL_NORM_MAX__ ((double)1.79769313486231570814527423731704357e+308L) # 0 "" #define __DBL_MIN__ ((double)2.22507385850720138309023271733240406e-308L) # 0 "" #define __DBL_EPSILON__ ((double)2.22044604925031308084726333618164062e-16L) # 0 "" #define __DBL_DENORM_MIN__ ((double)4.94065645841246544176568792868221372e-324L) # 0 "" #define __DBL_HAS_DENORM__ 1 # 0 "" #define __DBL_HAS_INFINITY__ 1 # 0 "" #define __DBL_HAS_QUIET_NAN__ 1 # 0 "" #define __DBL_IS_IEC_60559__ 2 # 0 "" #define __LDBL_MANT_DIG__ 64 # 0 "" #define __LDBL_DIG__ 18 # 0 "" #define __LDBL_MIN_EXP__ (-16381) # 0 "" #define __LDBL_MIN_10_EXP__ (-4931) # 0 "" #define __LDBL_MAX_EXP__ 16384 # 0 "" #define __LDBL_MAX_10_EXP__ 4932 # 0 "" #define __DECIMAL_DIG__ 21 # 0 "" #define __LDBL_DECIMAL_DIG__ 21 # 0 "" #define __LDBL_MAX__ 1.18973149535723176502126385303097021e+4932L # 0 "" #define __LDBL_NORM_MAX__ 1.18973149535723176502126385303097021e+4932L # 0 "" #define __LDBL_MIN__ 3.36210314311209350626267781732175260e-4932L # 0 "" #define __LDBL_EPSILON__ 1.08420217248550443400745280086994171e-19L # 0 "" #define __LDBL_DENORM_MIN__ 3.64519953188247460252840593361941982e-4951L # 0 "" #define __LDBL_HAS_DENORM__ 1 # 0 "" #define __LDBL_HAS_INFINITY__ 1 # 0 "" #define __LDBL_HAS_QUIET_NAN__ 1 # 0 "" #define __LDBL_IS_IEC_60559__ 2 # 0 "" #define __FLT16_MANT_DIG__ 11 # 0 "" #define __FLT16_DIG__ 3 # 0 "" #define __FLT16_MIN_EXP__ (-13) # 0 "" #define __FLT16_MIN_10_EXP__ (-4) # 0 "" #define __FLT16_MAX_EXP__ 16 # 0 "" #define __FLT16_MAX_10_EXP__ 4 # 0 "" #define __FLT16_DECIMAL_DIG__ 5 # 0 "" #define __FLT16_MAX__ 6.55040000000000000000000000000000000e+4F16 # 0 "" #define __FLT16_NORM_MAX__ 6.55040000000000000000000000000000000e+4F16 # 0 "" #define __FLT16_MIN__ 6.10351562500000000000000000000000000e-5F16 # 0 "" #define __FLT16_EPSILON__ 9.76562500000000000000000000000000000e-4F16 # 0 "" #define __FLT16_DENORM_MIN__ 5.96046447753906250000000000000000000e-8F16 # 0 "" #define __FLT16_HAS_DENORM__ 1 # 0 "" #define __FLT16_HAS_INFINITY__ 1 # 0 "" #define __FLT16_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT16_IS_IEC_60559__ 2 # 0 "" #define __FLT32_MANT_DIG__ 24 # 0 "" #define __FLT32_DIG__ 6 # 0 "" #define __FLT32_MIN_EXP__ (-125) # 0 "" #define __FLT32_MIN_10_EXP__ (-37) # 0 "" #define __FLT32_MAX_EXP__ 128 # 0 "" #define __FLT32_MAX_10_EXP__ 38 # 0 "" #define __FLT32_DECIMAL_DIG__ 9 # 0 "" #define __FLT32_MAX__ 3.40282346638528859811704183484516925e+38F32 # 0 "" #define __FLT32_NORM_MAX__ 3.40282346638528859811704183484516925e+38F32 # 0 "" #define __FLT32_MIN__ 1.17549435082228750796873653722224568e-38F32 # 0 "" #define __FLT32_EPSILON__ 1.19209289550781250000000000000000000e-7F32 # 0 "" #define __FLT32_DENORM_MIN__ 1.40129846432481707092372958328991613e-45F32 # 0 "" #define __FLT32_HAS_DENORM__ 1 # 0 "" #define __FLT32_HAS_INFINITY__ 1 # 0 "" #define __FLT32_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT32_IS_IEC_60559__ 2 # 0 "" #define __FLT64_MANT_DIG__ 53 # 0 "" #define __FLT64_DIG__ 15 # 0 "" #define __FLT64_MIN_EXP__ (-1021) # 0 "" #define __FLT64_MIN_10_EXP__ (-307) # 0 "" #define __FLT64_MAX_EXP__ 1024 # 0 "" #define __FLT64_MAX_10_EXP__ 308 # 0 "" #define __FLT64_DECIMAL_DIG__ 17 # 0 "" #define __FLT64_MAX__ 1.79769313486231570814527423731704357e+308F64 # 0 "" #define __FLT64_NORM_MAX__ 1.79769313486231570814527423731704357e+308F64 # 0 "" #define __FLT64_MIN__ 2.22507385850720138309023271733240406e-308F64 # 0 "" #define __FLT64_EPSILON__ 2.22044604925031308084726333618164062e-16F64 # 0 "" #define __FLT64_DENORM_MIN__ 4.94065645841246544176568792868221372e-324F64 # 0 "" #define __FLT64_HAS_DENORM__ 1 # 0 "" #define __FLT64_HAS_INFINITY__ 1 # 0 "" #define __FLT64_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT64_IS_IEC_60559__ 2 # 0 "" #define __FLT128_MANT_DIG__ 113 # 0 "" #define __FLT128_DIG__ 33 # 0 "" #define __FLT128_MIN_EXP__ (-16381) # 0 "" #define __FLT128_MIN_10_EXP__ (-4931) # 0 "" #define __FLT128_MAX_EXP__ 16384 # 0 "" #define __FLT128_MAX_10_EXP__ 4932 # 0 "" #define __FLT128_DECIMAL_DIG__ 36 # 0 "" #define __FLT128_MAX__ 1.18973149535723176508575932662800702e+4932F128 # 0 "" #define __FLT128_NORM_MAX__ 1.18973149535723176508575932662800702e+4932F128 # 0 "" #define __FLT128_MIN__ 3.36210314311209350626267781732175260e-4932F128 # 0 "" #define __FLT128_EPSILON__ 1.92592994438723585305597794258492732e-34F128 # 0 "" #define __FLT128_DENORM_MIN__ 6.47517511943802511092443895822764655e-4966F128 # 0 "" #define __FLT128_HAS_DENORM__ 1 # 0 "" #define __FLT128_HAS_INFINITY__ 1 # 0 "" #define __FLT128_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT128_IS_IEC_60559__ 2 # 0 "" #define __FLT32X_MANT_DIG__ 53 # 0 "" #define __FLT32X_DIG__ 15 # 0 "" #define __FLT32X_MIN_EXP__ (-1021) # 0 "" #define __FLT32X_MIN_10_EXP__ (-307) # 0 "" #define __FLT32X_MAX_EXP__ 1024 # 0 "" #define __FLT32X_MAX_10_EXP__ 308 # 0 "" #define __FLT32X_DECIMAL_DIG__ 17 # 0 "" #define __FLT32X_MAX__ 1.79769313486231570814527423731704357e+308F32x # 0 "" #define __FLT32X_NORM_MAX__ 1.79769313486231570814527423731704357e+308F32x # 0 "" #define __FLT32X_MIN__ 2.22507385850720138309023271733240406e-308F32x # 0 "" #define __FLT32X_EPSILON__ 2.22044604925031308084726333618164062e-16F32x # 0 "" #define __FLT32X_DENORM_MIN__ 4.94065645841246544176568792868221372e-324F32x # 0 "" #define __FLT32X_HAS_DENORM__ 1 # 0 "" #define __FLT32X_HAS_INFINITY__ 1 # 0 "" #define __FLT32X_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT32X_IS_IEC_60559__ 2 # 0 "" #define __FLT64X_MANT_DIG__ 64 # 0 "" #define __FLT64X_DIG__ 18 # 0 "" #define __FLT64X_MIN_EXP__ (-16381) # 0 "" #define __FLT64X_MIN_10_EXP__ (-4931) # 0 "" #define __FLT64X_MAX_EXP__ 16384 # 0 "" #define __FLT64X_MAX_10_EXP__ 4932 # 0 "" #define __FLT64X_DECIMAL_DIG__ 21 # 0 "" #define __FLT64X_MAX__ 1.18973149535723176502126385303097021e+4932F64x # 0 "" #define __FLT64X_NORM_MAX__ 1.18973149535723176502126385303097021e+4932F64x # 0 "" #define __FLT64X_MIN__ 3.36210314311209350626267781732175260e-4932F64x # 0 "" #define __FLT64X_EPSILON__ 1.08420217248550443400745280086994171e-19F64x # 0 "" #define __FLT64X_DENORM_MIN__ 3.64519953188247460252840593361941982e-4951F64x # 0 "" #define __FLT64X_HAS_DENORM__ 1 # 0 "" #define __FLT64X_HAS_INFINITY__ 1 # 0 "" #define __FLT64X_HAS_QUIET_NAN__ 1 # 0 "" #define __FLT64X_IS_IEC_60559__ 2 # 0 "" #define __DEC32_MANT_DIG__ 7 # 0 "" #define __DEC32_MIN_EXP__ (-94) # 0 "" #define __DEC32_MAX_EXP__ 97 # 0 "" #define __DEC32_MIN__ 1E-95DF # 0 "" #define __DEC32_MAX__ 9.999999E96DF # 0 "" #define __DEC32_EPSILON__ 1E-6DF # 0 "" #define __DEC32_SUBNORMAL_MIN__ 0.000001E-95DF # 0 "" #define __DEC64_MANT_DIG__ 16 # 0 "" #define __DEC64_MIN_EXP__ (-382) # 0 "" #define __DEC64_MAX_EXP__ 385 # 0 "" #define __DEC64_MIN__ 1E-383DD # 0 "" #define __DEC64_MAX__ 9.999999999999999E384DD # 0 "" #define __DEC64_EPSILON__ 1E-15DD # 0 "" #define __DEC64_SUBNORMAL_MIN__ 0.000000000000001E-383DD # 0 "" #define __DEC128_MANT_DIG__ 34 # 0 "" #define __DEC128_MIN_EXP__ (-6142) # 0 "" #define __DEC128_MAX_EXP__ 6145 # 0 "" #define __DEC128_MIN__ 1E-6143DL # 0 "" #define __DEC128_MAX__ 9.999999999999999999999999999999999E6144DL # 0 "" #define __DEC128_EPSILON__ 1E-33DL # 0 "" #define __DEC128_SUBNORMAL_MIN__ 0.000000000000000000000000000000001E-6143DL # 0 "" #define __REGISTER_PREFIX__ # 0 "" #define __USER_LABEL_PREFIX__ # 0 "" #define __GNUC_STDC_INLINE__ 1 # 0 "" #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 # 0 "" #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1 # 0 "" #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1 # 0 "" #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1 # 0 "" #define __GCC_ATOMIC_BOOL_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_CHAR_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_SHORT_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_INT_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_LONG_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_LLONG_LOCK_FREE 2 # 0 "" #define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1 # 0 "" #define __GCC_DESTRUCTIVE_SIZE 64 # 0 "" #define __GCC_CONSTRUCTIVE_SIZE 64 # 0 "" #define __GCC_ATOMIC_POINTER_LOCK_FREE 2 # 0 "" #define __HAVE_SPECULATION_SAFE_VALUE 1 # 0 "" #define __GCC_HAVE_DWARF2_CFI_ASM 1 # 0 "" #define __PRAGMA_REDEFINE_EXTNAME 1 # 0 "" #define __SIZEOF_INT128__ 16 # 0 "" #define __SIZEOF_WCHAR_T__ 4 # 0 "" #define __SIZEOF_WINT_T__ 4 # 0 "" #define __SIZEOF_PTRDIFF_T__ 8 # 0 "" #define __amd64 1 # 0 "" #define __amd64__ 1 # 0 "" #define __x86_64 1 # 0 "" #define __x86_64__ 1 # 0 "" #define __SIZEOF_FLOAT80__ 16 # 0 "" #define __SIZEOF_FLOAT128__ 16 # 0 "" #define __ATOMIC_HLE_ACQUIRE 65536 # 0 "" #define __ATOMIC_HLE_RELEASE 131072 # 0 "" #define __GCC_ASM_FLAG_OUTPUTS__ 1 # 0 "" #define __k8 1 # 0 "" #define __k8__ 1 # 0 "" #define __code_model_small__ 1 # 0 "" #define __MMX__ 1 # 0 "" #define __SSE__ 1 # 0 "" #define __SSE2__ 1 # 0 "" #define __FXSR__ 1 # 0 "" #define __SSE_MATH__ 1 # 0 "" #define __SSE2_MATH__ 1 # 0 "" #define __MMX_WITH_SSE__ 1 # 0 "" #define __SEG_FS 1 # 0 "" #define __SEG_GS 1 # 0 "" #define __gnu_linux__ 1 # 0 "" #define __linux 1 # 0 "" #define __linux__ 1 # 0 "" #define linux 1 # 0 "" #define __unix 1 # 0 "" #define __unix__ 1 # 0 "" #define unix 1 # 0 "" #define __ELF__ 1 # 0 "" #define __DECIMAL_BID_FORMAT__ 1 # 0 "" #define NDEBUG 1 # 0 "" # 1 "/usr/include/stdc-predef.h" 1 3 4 # 19 "/usr/include/stdc-predef.h" 3 4 #define _STDC_PREDEF_H 1 # 38 "/usr/include/stdc-predef.h" 3 4 #define __STDC_IEC_559__ 1 #define __STDC_IEC_60559_BFP__ 201404L # 48 "/usr/include/stdc-predef.h" 3 4 #define __STDC_IEC_559_COMPLEX__ 1 #define __STDC_IEC_60559_COMPLEX__ 201404L # 62 "/usr/include/stdc-predef.h" 3 4 #define __STDC_ISO_10646__ 201706L # 0 "" 2 # 1 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/aesni-gcm-x86_64-elf.S" # 1 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" 1 # 16 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" #define OPENSSL_HEADER_ASM_BASE_H # 1 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/target.h" 1 # 16 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/target.h" #define OPENSSL_HEADER_TARGET_H # 26 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/target.h" #define OPENSSL_64_BIT #define OPENSSL_X86_64 # 19 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" 2 # 42 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" # 1 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/ring_core_generated/prefix_symbols_asm.h" 1 #define ring_core_generated_PREFIX_SYMBOLS_ASM_H # 170 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/ring_core_generated/prefix_symbols_asm.h" #define ecp_nistz256_point_double p256_point_double #define ecp_nistz256_point_add p256_point_add #define ecp_nistz256_point_add_affine p256_point_add_affine #define ecp_nistz256_ord_mul_mont p256_scalar_mul_mont #define ecp_nistz256_ord_sqr_mont p256_scalar_sqr_rep_mont #define ecp_nistz256_mul_mont p256_mul_mont #define ecp_nistz256_sqr_mont p256_sqr_mont #define adx_bmi2_available ring_core_0_17_14__adx_bmi2_available #define avx2_available ring_core_0_17_14__avx2_available #define CRYPTO_memcmp ring_core_0_17_14__CRYPTO_memcmp #define CRYPTO_poly1305_finish ring_core_0_17_14__CRYPTO_poly1305_finish #define CRYPTO_poly1305_finish_neon ring_core_0_17_14__CRYPTO_poly1305_finish_neon #define CRYPTO_poly1305_init ring_core_0_17_14__CRYPTO_poly1305_init #define CRYPTO_poly1305_init_neon ring_core_0_17_14__CRYPTO_poly1305_init_neon #define CRYPTO_poly1305_update ring_core_0_17_14__CRYPTO_poly1305_update #define CRYPTO_poly1305_update_neon ring_core_0_17_14__CRYPTO_poly1305_update_neon #define ChaCha20_ctr32 ring_core_0_17_14__ChaCha20_ctr32 #define ChaCha20_ctr32_avx2 ring_core_0_17_14__ChaCha20_ctr32_avx2 #define ChaCha20_ctr32_neon ring_core_0_17_14__ChaCha20_ctr32_neon #define ChaCha20_ctr32_nohw ring_core_0_17_14__ChaCha20_ctr32_nohw #define ChaCha20_ctr32_ssse3 ring_core_0_17_14__ChaCha20_ctr32_ssse3 #define ChaCha20_ctr32_ssse3_4x ring_core_0_17_14__ChaCha20_ctr32_ssse3_4x #define LIMB_is_zero ring_core_0_17_14__LIMB_is_zero #define LIMBS_add_mod ring_core_0_17_14__LIMBS_add_mod #define LIMBS_are_zero ring_core_0_17_14__LIMBS_are_zero #define LIMBS_equal ring_core_0_17_14__LIMBS_equal #define LIMBS_less_than ring_core_0_17_14__LIMBS_less_than #define LIMBS_reduce_once ring_core_0_17_14__LIMBS_reduce_once #define LIMBS_select_512_32 ring_core_0_17_14__LIMBS_select_512_32 #define LIMBS_shl_mod ring_core_0_17_14__LIMBS_shl_mod #define LIMBS_sub_mod ring_core_0_17_14__LIMBS_sub_mod #define LIMBS_window5_split_window ring_core_0_17_14__LIMBS_window5_split_window #define LIMBS_window5_unsplit_window ring_core_0_17_14__LIMBS_window5_unsplit_window #define LIMB_shr ring_core_0_17_14__LIMB_shr #define OPENSSL_cpuid_setup ring_core_0_17_14__OPENSSL_cpuid_setup #define aes_gcm_dec_kernel ring_core_0_17_14__aes_gcm_dec_kernel #define aes_gcm_dec_update_vaes_avx2 ring_core_0_17_14__aes_gcm_dec_update_vaes_avx2 #define aes_gcm_enc_kernel ring_core_0_17_14__aes_gcm_enc_kernel #define aes_gcm_enc_update_vaes_avx2 ring_core_0_17_14__aes_gcm_enc_update_vaes_avx2 #define aes_hw_ctr32_encrypt_blocks ring_core_0_17_14__aes_hw_ctr32_encrypt_blocks #define aes_hw_set_encrypt_key ring_core_0_17_14__aes_hw_set_encrypt_key #define aes_hw_set_encrypt_key_alt ring_core_0_17_14__aes_hw_set_encrypt_key_alt #define aes_hw_set_encrypt_key_base ring_core_0_17_14__aes_hw_set_encrypt_key_base #define aes_nohw_ctr32_encrypt_blocks ring_core_0_17_14__aes_nohw_ctr32_encrypt_blocks #define aes_nohw_encrypt ring_core_0_17_14__aes_nohw_encrypt #define aes_nohw_set_encrypt_key ring_core_0_17_14__aes_nohw_set_encrypt_key #define aesni_gcm_decrypt ring_core_0_17_14__aesni_gcm_decrypt #define aesni_gcm_encrypt ring_core_0_17_14__aesni_gcm_encrypt #define bn_from_montgomery_in_place ring_core_0_17_14__bn_from_montgomery_in_place #define bn_gather5 ring_core_0_17_14__bn_gather5 #define bn_mul_mont ring_core_0_17_14__bn_mul_mont #define bn_mul_mont_nohw ring_core_0_17_14__bn_mul_mont_nohw #define bn_mul4x_mont ring_core_0_17_14__bn_mul4x_mont #define bn_mulx4x_mont ring_core_0_17_14__bn_mulx4x_mont #define bn_mul8x_mont_neon ring_core_0_17_14__bn_mul8x_mont_neon #define bn_mul4x_mont_gather5 ring_core_0_17_14__bn_mul4x_mont_gather5 #define bn_mulx4x_mont_gather5 ring_core_0_17_14__bn_mulx4x_mont_gather5 #define bn_neg_inv_mod_r_u64 ring_core_0_17_14__bn_neg_inv_mod_r_u64 #define bn_power5_nohw ring_core_0_17_14__bn_power5_nohw #define bn_powerx5 ring_core_0_17_14__bn_powerx5 #define bn_scatter5 ring_core_0_17_14__bn_scatter5 #define bn_sqr8x_internal ring_core_0_17_14__bn_sqr8x_internal #define bn_sqr8x_mont ring_core_0_17_14__bn_sqr8x_mont #define bn_sqrx8x_internal ring_core_0_17_14__bn_sqrx8x_internal #define bsaes_ctr32_encrypt_blocks ring_core_0_17_14__bsaes_ctr32_encrypt_blocks #define bssl_constant_time_test_conditional_memcpy ring_core_0_17_14__bssl_constant_time_test_conditional_memcpy #define bssl_constant_time_test_conditional_memxor ring_core_0_17_14__bssl_constant_time_test_conditional_memxor #define bssl_constant_time_test_main ring_core_0_17_14__bssl_constant_time_test_main #define chacha20_poly1305_open ring_core_0_17_14__chacha20_poly1305_open #define chacha20_poly1305_open_avx2 ring_core_0_17_14__chacha20_poly1305_open_avx2 #define chacha20_poly1305_open_sse41 ring_core_0_17_14__chacha20_poly1305_open_sse41 #define chacha20_poly1305_seal ring_core_0_17_14__chacha20_poly1305_seal #define chacha20_poly1305_seal_avx2 ring_core_0_17_14__chacha20_poly1305_seal_avx2 #define chacha20_poly1305_seal_sse41 ring_core_0_17_14__chacha20_poly1305_seal_sse41 #define ecp_nistz256_mul_mont_adx ring_core_0_17_14__ecp_nistz256_mul_mont_adx #define ecp_nistz256_mul_mont_nohw ring_core_0_17_14__ecp_nistz256_mul_mont_nohw #define ecp_nistz256_ord_mul_mont_adx ring_core_0_17_14__ecp_nistz256_ord_mul_mont_adx #define ecp_nistz256_ord_mul_mont_nohw ring_core_0_17_14__ecp_nistz256_ord_mul_mont_nohw #define ecp_nistz256_ord_sqr_mont_adx ring_core_0_17_14__ecp_nistz256_ord_sqr_mont_adx #define ecp_nistz256_ord_sqr_mont_nohw ring_core_0_17_14__ecp_nistz256_ord_sqr_mont_nohw #define ecp_nistz256_point_add_adx ring_core_0_17_14__ecp_nistz256_point_add_adx #define ecp_nistz256_point_add_nohw ring_core_0_17_14__ecp_nistz256_point_add_nohw #define ecp_nistz256_point_add_affine_adx ring_core_0_17_14__ecp_nistz256_point_add_affine_adx #define ecp_nistz256_point_add_affine_nohw ring_core_0_17_14__ecp_nistz256_point_add_affine_nohw #define ecp_nistz256_point_double_adx ring_core_0_17_14__ecp_nistz256_point_double_adx #define ecp_nistz256_point_double_nohw ring_core_0_17_14__ecp_nistz256_point_double_nohw #define ecp_nistz256_select_w5_avx2 ring_core_0_17_14__ecp_nistz256_select_w5_avx2 #define ecp_nistz256_select_w5_nohw ring_core_0_17_14__ecp_nistz256_select_w5_nohw #define ecp_nistz256_select_w7_avx2 ring_core_0_17_14__ecp_nistz256_select_w7_avx2 #define ecp_nistz256_select_w7_nohw ring_core_0_17_14__ecp_nistz256_select_w7_nohw #define ecp_nistz256_sqr_mont_adx ring_core_0_17_14__ecp_nistz256_sqr_mont_adx #define ecp_nistz256_sqr_mont_nohw ring_core_0_17_14__ecp_nistz256_sqr_mont_nohw #define fiat_curve25519_adx_mul ring_core_0_17_14__fiat_curve25519_adx_mul #define fiat_curve25519_adx_square ring_core_0_17_14__fiat_curve25519_adx_square #define gcm_ghash_avx ring_core_0_17_14__gcm_ghash_avx #define gcm_ghash_clmul ring_core_0_17_14__gcm_ghash_clmul #define gcm_ghash_neon ring_core_0_17_14__gcm_ghash_neon #define gcm_ghash_vpclmulqdq_avx2_1 ring_core_0_17_14__gcm_ghash_vpclmulqdq_avx2_1 #define gcm_gmult_clmul ring_core_0_17_14__gcm_gmult_clmul #define gcm_gmult_neon ring_core_0_17_14__gcm_gmult_neon #define gcm_init_avx ring_core_0_17_14__gcm_init_avx #define gcm_init_clmul ring_core_0_17_14__gcm_init_clmul #define gcm_init_neon ring_core_0_17_14__gcm_init_neon #define gcm_init_vpclmulqdq_avx2 ring_core_0_17_14__gcm_init_vpclmulqdq_avx2 #define k25519Precomp ring_core_0_17_14__k25519Precomp #define limbs_mul_add_limb ring_core_0_17_14__limbs_mul_add_limb #define little_endian_bytes_from_scalar ring_core_0_17_14__little_endian_bytes_from_scalar #define ecp_nistz256_neg ring_core_0_17_14__ecp_nistz256_neg #define ecp_nistz256_select_w5 ring_core_0_17_14__ecp_nistz256_select_w5 #define ecp_nistz256_select_w7 ring_core_0_17_14__ecp_nistz256_select_w7 #define neon_available ring_core_0_17_14__neon_available #define p256_mul_mont ring_core_0_17_14__p256_mul_mont #define p256_point_add ring_core_0_17_14__p256_point_add #define p256_point_add_affine ring_core_0_17_14__p256_point_add_affine #define p256_point_double ring_core_0_17_14__p256_point_double #define p256_point_mul ring_core_0_17_14__p256_point_mul #define p256_point_mul_base ring_core_0_17_14__p256_point_mul_base #define p256_point_mul_base_vartime ring_core_0_17_14__p256_point_mul_base_vartime #define p256_scalar_mul_mont ring_core_0_17_14__p256_scalar_mul_mont #define p256_scalar_sqr_rep_mont ring_core_0_17_14__p256_scalar_sqr_rep_mont #define p256_sqr_mont ring_core_0_17_14__p256_sqr_mont #define p384_elem_div_by_2 ring_core_0_17_14__p384_elem_div_by_2 #define p384_elem_mul_mont ring_core_0_17_14__p384_elem_mul_mont #define p384_elem_neg ring_core_0_17_14__p384_elem_neg #define p384_elem_sub ring_core_0_17_14__p384_elem_sub #define p384_point_add ring_core_0_17_14__p384_point_add #define p384_point_double ring_core_0_17_14__p384_point_double #define p384_point_mul ring_core_0_17_14__p384_point_mul #define p384_scalar_mul_mont ring_core_0_17_14__p384_scalar_mul_mont #define openssl_poly1305_neon2_addmulmod ring_core_0_17_14__openssl_poly1305_neon2_addmulmod #define openssl_poly1305_neon2_blocks ring_core_0_17_14__openssl_poly1305_neon2_blocks #define sha256_block_data_order ring_core_0_17_14__sha256_block_data_order #define sha256_block_data_order_avx ring_core_0_17_14__sha256_block_data_order_avx #define sha256_block_data_order_ssse3 ring_core_0_17_14__sha256_block_data_order_ssse3 #define sha256_block_data_order_hw ring_core_0_17_14__sha256_block_data_order_hw #define sha256_block_data_order_neon ring_core_0_17_14__sha256_block_data_order_neon #define sha256_block_data_order_nohw ring_core_0_17_14__sha256_block_data_order_nohw #define sha512_block_data_order ring_core_0_17_14__sha512_block_data_order #define sha512_block_data_order_avx ring_core_0_17_14__sha512_block_data_order_avx #define sha512_block_data_order_hw ring_core_0_17_14__sha512_block_data_order_hw #define sha512_block_data_order_neon ring_core_0_17_14__sha512_block_data_order_neon #define sha512_block_data_order_nohw ring_core_0_17_14__sha512_block_data_order_nohw #define vpaes_ctr32_encrypt_blocks ring_core_0_17_14__vpaes_ctr32_encrypt_blocks #define vpaes_encrypt ring_core_0_17_14__vpaes_encrypt #define vpaes_encrypt_key_to_bsaes ring_core_0_17_14__vpaes_encrypt_key_to_bsaes #define vpaes_set_encrypt_key ring_core_0_17_14__vpaes_set_encrypt_key #define x25519_NEON ring_core_0_17_14__x25519_NEON #define x25519_fe_invert ring_core_0_17_14__x25519_fe_invert #define x25519_fe_isnegative ring_core_0_17_14__x25519_fe_isnegative #define x25519_fe_mul_ttt ring_core_0_17_14__x25519_fe_mul_ttt #define x25519_fe_neg ring_core_0_17_14__x25519_fe_neg #define x25519_fe_tobytes ring_core_0_17_14__x25519_fe_tobytes #define x25519_ge_double_scalarmult_vartime ring_core_0_17_14__x25519_ge_double_scalarmult_vartime #define x25519_ge_frombytes_vartime ring_core_0_17_14__x25519_ge_frombytes_vartime #define x25519_ge_scalarmult_base ring_core_0_17_14__x25519_ge_scalarmult_base #define x25519_ge_scalarmult_base_adx ring_core_0_17_14__x25519_ge_scalarmult_base_adx #define x25519_public_from_private_generic_masked ring_core_0_17_14__x25519_public_from_private_generic_masked #define x25519_sc_mask ring_core_0_17_14__x25519_sc_mask #define x25519_sc_muladd ring_core_0_17_14__x25519_sc_muladd #define x25519_sc_reduce ring_core_0_17_14__x25519_sc_reduce #define x25519_scalar_mult_adx ring_core_0_17_14__x25519_scalar_mult_adx #define x25519_scalar_mult_generic_masked ring_core_0_17_14__x25519_scalar_mult_generic_masked # 43 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" 2 .pushsection .note.GNU-stack, "", %progbits .popsection # 64 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/include/ring-core/asm_base.h" #define _CET_ENDBR # 5 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/aesni-gcm-x86_64-elf.S" 2 .text .type _aesni_ctr32_ghash_6x,@function .align 32 _aesni_ctr32_ghash_6x: .cfi_startproc vmovdqu 32(%r11),%xmm2 subq $6,%rdx vpxor %xmm4,%xmm4,%xmm4 vmovdqu 0-128(%rcx),%xmm15 vpaddb %xmm2,%xmm1,%xmm10 vpaddb %xmm2,%xmm10,%xmm11 vpaddb %xmm2,%xmm11,%xmm12 vpaddb %xmm2,%xmm12,%xmm13 vpaddb %xmm2,%xmm13,%xmm14 vpxor %xmm15,%xmm1,%xmm9 vmovdqu %xmm4,16+8(%rsp) jmp .Loop6x .align 32 .Loop6x: addl $100663296,%ebx jc .Lhandle_ctr32 vmovdqu 0-32(%r9),%xmm3 vpaddb %xmm2,%xmm14,%xmm1 vpxor %xmm15,%xmm10,%xmm10 vpxor %xmm15,%xmm11,%xmm11 .Lresume_ctr32: vmovdqu %xmm1,(%r8) vpclmulqdq $0x10,%xmm3,%xmm7,%xmm5 vpxor %xmm15,%xmm12,%xmm12 vmovups 16-128(%rcx),%xmm2 vpclmulqdq $0x01,%xmm3,%xmm7,%xmm6 # 58 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/aesni-gcm-x86_64-elf.S" xorq %r12,%r12 cmpq %r14,%r15 vaesenc %xmm2,%xmm9,%xmm9 vmovdqu 48+8(%rsp),%xmm0 vpxor %xmm15,%xmm13,%xmm13 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm1 vaesenc %xmm2,%xmm10,%xmm10 vpxor %xmm15,%xmm14,%xmm14 setnc %r12b vpclmulqdq $0x11,%xmm3,%xmm7,%xmm7 vaesenc %xmm2,%xmm11,%xmm11 vmovdqu 16-32(%r9),%xmm3 negq %r12 vaesenc %xmm2,%xmm12,%xmm12 vpxor %xmm5,%xmm6,%xmm6 vpclmulqdq $0x00,%xmm3,%xmm0,%xmm5 vpxor %xmm4,%xmm8,%xmm8 vaesenc %xmm2,%xmm13,%xmm13 vpxor %xmm5,%xmm1,%xmm4 andq $0x60,%r12 vmovups 32-128(%rcx),%xmm15 vpclmulqdq $0x10,%xmm3,%xmm0,%xmm1 vaesenc %xmm2,%xmm14,%xmm14 vpclmulqdq $0x01,%xmm3,%xmm0,%xmm2 leaq (%r14,%r12,1),%r14 vaesenc %xmm15,%xmm9,%xmm9 vpxor 16+8(%rsp),%xmm8,%xmm8 vpclmulqdq $0x11,%xmm3,%xmm0,%xmm3 vmovdqu 64+8(%rsp),%xmm0 vaesenc %xmm15,%xmm10,%xmm10 movbeq 88(%r14),%r13 vaesenc %xmm15,%xmm11,%xmm11 movbeq 80(%r14),%r12 vaesenc %xmm15,%xmm12,%xmm12 movq %r13,32+8(%rsp) vaesenc %xmm15,%xmm13,%xmm13 movq %r12,40+8(%rsp) vmovdqu 48-32(%r9),%xmm5 vaesenc %xmm15,%xmm14,%xmm14 vmovups 48-128(%rcx),%xmm15 vpxor %xmm1,%xmm6,%xmm6 vpclmulqdq $0x00,%xmm5,%xmm0,%xmm1 vaesenc %xmm15,%xmm9,%xmm9 vpxor %xmm2,%xmm6,%xmm6 vpclmulqdq $0x10,%xmm5,%xmm0,%xmm2 vaesenc %xmm15,%xmm10,%xmm10 vpxor %xmm3,%xmm7,%xmm7 vpclmulqdq $0x01,%xmm5,%xmm0,%xmm3 vaesenc %xmm15,%xmm11,%xmm11 vpclmulqdq $0x11,%xmm5,%xmm0,%xmm5 vmovdqu 80+8(%rsp),%xmm0 vaesenc %xmm15,%xmm12,%xmm12 vaesenc %xmm15,%xmm13,%xmm13 vpxor %xmm1,%xmm4,%xmm4 vmovdqu 64-32(%r9),%xmm1 vaesenc %xmm15,%xmm14,%xmm14 vmovups 64-128(%rcx),%xmm15 vpxor %xmm2,%xmm6,%xmm6 vpclmulqdq $0x00,%xmm1,%xmm0,%xmm2 vaesenc %xmm15,%xmm9,%xmm9 vpxor %xmm3,%xmm6,%xmm6 vpclmulqdq $0x10,%xmm1,%xmm0,%xmm3 vaesenc %xmm15,%xmm10,%xmm10 movbeq 72(%r14),%r13 vpxor %xmm5,%xmm7,%xmm7 vpclmulqdq $0x01,%xmm1,%xmm0,%xmm5 vaesenc %xmm15,%xmm11,%xmm11 movbeq 64(%r14),%r12 vpclmulqdq $0x11,%xmm1,%xmm0,%xmm1 vmovdqu 96+8(%rsp),%xmm0 vaesenc %xmm15,%xmm12,%xmm12 movq %r13,48+8(%rsp) vaesenc %xmm15,%xmm13,%xmm13 movq %r12,56+8(%rsp) vpxor %xmm2,%xmm4,%xmm4 vmovdqu 96-32(%r9),%xmm2 vaesenc %xmm15,%xmm14,%xmm14 vmovups 80-128(%rcx),%xmm15 vpxor %xmm3,%xmm6,%xmm6 vpclmulqdq $0x00,%xmm2,%xmm0,%xmm3 vaesenc %xmm15,%xmm9,%xmm9 vpxor %xmm5,%xmm6,%xmm6 vpclmulqdq $0x10,%xmm2,%xmm0,%xmm5 vaesenc %xmm15,%xmm10,%xmm10 movbeq 56(%r14),%r13 vpxor %xmm1,%xmm7,%xmm7 vpclmulqdq $0x01,%xmm2,%xmm0,%xmm1 vpxor 112+8(%rsp),%xmm8,%xmm8 vaesenc %xmm15,%xmm11,%xmm11 movbeq 48(%r14),%r12 vpclmulqdq $0x11,%xmm2,%xmm0,%xmm2 vaesenc %xmm15,%xmm12,%xmm12 movq %r13,64+8(%rsp) vaesenc %xmm15,%xmm13,%xmm13 movq %r12,72+8(%rsp) vpxor %xmm3,%xmm4,%xmm4 vmovdqu 112-32(%r9),%xmm3 vaesenc %xmm15,%xmm14,%xmm14 vmovups 96-128(%rcx),%xmm15 vpxor %xmm5,%xmm6,%xmm6 vpclmulqdq $0x10,%xmm3,%xmm8,%xmm5 vaesenc %xmm15,%xmm9,%xmm9 vpxor %xmm1,%xmm6,%xmm6 vpclmulqdq $0x01,%xmm3,%xmm8,%xmm1 vaesenc %xmm15,%xmm10,%xmm10 movbeq 40(%r14),%r13 vpxor %xmm2,%xmm7,%xmm7 vpclmulqdq $0x00,%xmm3,%xmm8,%xmm2 vaesenc %xmm15,%xmm11,%xmm11 movbeq 32(%r14),%r12 vpclmulqdq $0x11,%xmm3,%xmm8,%xmm8 vaesenc %xmm15,%xmm12,%xmm12 movq %r13,80+8(%rsp) vaesenc %xmm15,%xmm13,%xmm13 movq %r12,88+8(%rsp) vpxor %xmm5,%xmm6,%xmm6 vaesenc %xmm15,%xmm14,%xmm14 vpxor %xmm1,%xmm6,%xmm6 vmovups 112-128(%rcx),%xmm15 vpslldq $8,%xmm6,%xmm5 vpxor %xmm2,%xmm4,%xmm4 vmovdqu 16(%r11),%xmm3 vaesenc %xmm15,%xmm9,%xmm9 vpxor %xmm8,%xmm7,%xmm7 vaesenc %xmm15,%xmm10,%xmm10 vpxor %xmm5,%xmm4,%xmm4 movbeq 24(%r14),%r13 vaesenc %xmm15,%xmm11,%xmm11 movbeq 16(%r14),%r12 vpalignr $8,%xmm4,%xmm4,%xmm0 vpclmulqdq $0x10,%xmm3,%xmm4,%xmm4 movq %r13,96+8(%rsp) vaesenc %xmm15,%xmm12,%xmm12 movq %r12,104+8(%rsp) vaesenc %xmm15,%xmm13,%xmm13 vmovups 128-128(%rcx),%xmm1 vaesenc %xmm15,%xmm14,%xmm14 vaesenc %xmm1,%xmm9,%xmm9 vmovups 144-128(%rcx),%xmm15 vaesenc %xmm1,%xmm10,%xmm10 vpsrldq $8,%xmm6,%xmm6 vaesenc %xmm1,%xmm11,%xmm11 vpxor %xmm6,%xmm7,%xmm7 vaesenc %xmm1,%xmm12,%xmm12 vpxor %xmm0,%xmm4,%xmm4 movbeq 8(%r14),%r13 vaesenc %xmm1,%xmm13,%xmm13 movbeq 0(%r14),%r12 vaesenc %xmm1,%xmm14,%xmm14 vmovups 160-128(%rcx),%xmm1 cmpl $11,%r10d jb .Lenc_tail vaesenc %xmm15,%xmm9,%xmm9 vaesenc %xmm15,%xmm10,%xmm10 vaesenc %xmm15,%xmm11,%xmm11 vaesenc %xmm15,%xmm12,%xmm12 vaesenc %xmm15,%xmm13,%xmm13 vaesenc %xmm15,%xmm14,%xmm14 vaesenc %xmm1,%xmm9,%xmm9 vaesenc %xmm1,%xmm10,%xmm10 vaesenc %xmm1,%xmm11,%xmm11 vaesenc %xmm1,%xmm12,%xmm12 vaesenc %xmm1,%xmm13,%xmm13 vmovups 176-128(%rcx),%xmm15 vaesenc %xmm1,%xmm14,%xmm14 vmovups 192-128(%rcx),%xmm1 vaesenc %xmm15,%xmm9,%xmm9 vaesenc %xmm15,%xmm10,%xmm10 vaesenc %xmm15,%xmm11,%xmm11 vaesenc %xmm15,%xmm12,%xmm12 vaesenc %xmm15,%xmm13,%xmm13 vaesenc %xmm15,%xmm14,%xmm14 vaesenc %xmm1,%xmm9,%xmm9 vaesenc %xmm1,%xmm10,%xmm10 vaesenc %xmm1,%xmm11,%xmm11 vaesenc %xmm1,%xmm12,%xmm12 vaesenc %xmm1,%xmm13,%xmm13 vmovups 208-128(%rcx),%xmm15 vaesenc %xmm1,%xmm14,%xmm14 vmovups 224-128(%rcx),%xmm1 jmp .Lenc_tail .align 32 .Lhandle_ctr32: vmovdqu (%r11),%xmm0 vpshufb %xmm0,%xmm1,%xmm6 vmovdqu 48(%r11),%xmm5 vpaddd 64(%r11),%xmm6,%xmm10 vpaddd %xmm5,%xmm6,%xmm11 vmovdqu 0-32(%r9),%xmm3 vpaddd %xmm5,%xmm10,%xmm12 vpshufb %xmm0,%xmm10,%xmm10 vpaddd %xmm5,%xmm11,%xmm13 vpshufb %xmm0,%xmm11,%xmm11 vpxor %xmm15,%xmm10,%xmm10 vpaddd %xmm5,%xmm12,%xmm14 vpshufb %xmm0,%xmm12,%xmm12 vpxor %xmm15,%xmm11,%xmm11 vpaddd %xmm5,%xmm13,%xmm1 vpshufb %xmm0,%xmm13,%xmm13 vpshufb %xmm0,%xmm14,%xmm14 vpshufb %xmm0,%xmm1,%xmm1 jmp .Lresume_ctr32 .align 32 .Lenc_tail: vaesenc %xmm15,%xmm9,%xmm9 vmovdqu %xmm7,16+8(%rsp) vpalignr $8,%xmm4,%xmm4,%xmm8 vaesenc %xmm15,%xmm10,%xmm10 vpclmulqdq $0x10,%xmm3,%xmm4,%xmm4 vpxor 0(%rdi),%xmm1,%xmm2 vaesenc %xmm15,%xmm11,%xmm11 vpxor 16(%rdi),%xmm1,%xmm0 vaesenc %xmm15,%xmm12,%xmm12 vpxor 32(%rdi),%xmm1,%xmm5 vaesenc %xmm15,%xmm13,%xmm13 vpxor 48(%rdi),%xmm1,%xmm6 vaesenc %xmm15,%xmm14,%xmm14 vpxor 64(%rdi),%xmm1,%xmm7 vpxor 80(%rdi),%xmm1,%xmm3 vmovdqu (%r8),%xmm1 vaesenclast %xmm2,%xmm9,%xmm9 vmovdqu 32(%r11),%xmm2 vaesenclast %xmm0,%xmm10,%xmm10 vpaddb %xmm2,%xmm1,%xmm0 movq %r13,112+8(%rsp) leaq 96(%rdi),%rdi prefetcht0 512(%rdi) prefetcht0 576(%rdi) vaesenclast %xmm5,%xmm11,%xmm11 vpaddb %xmm2,%xmm0,%xmm5 movq %r12,120+8(%rsp) leaq 96(%rsi),%rsi vmovdqu 0-128(%rcx),%xmm15 vaesenclast %xmm6,%xmm12,%xmm12 vpaddb %xmm2,%xmm5,%xmm6 vaesenclast %xmm7,%xmm13,%xmm13 vpaddb %xmm2,%xmm6,%xmm7 vaesenclast %xmm3,%xmm14,%xmm14 vpaddb %xmm2,%xmm7,%xmm3 addq $0x60,%rax subq $0x6,%rdx jc .L6x_done vmovups %xmm9,-96(%rsi) vpxor %xmm15,%xmm1,%xmm9 vmovups %xmm10,-80(%rsi) vmovdqa %xmm0,%xmm10 vmovups %xmm11,-64(%rsi) vmovdqa %xmm5,%xmm11 vmovups %xmm12,-48(%rsi) vmovdqa %xmm6,%xmm12 vmovups %xmm13,-32(%rsi) vmovdqa %xmm7,%xmm13 vmovups %xmm14,-16(%rsi) vmovdqa %xmm3,%xmm14 vmovdqu 32+8(%rsp),%xmm7 jmp .Loop6x .L6x_done: vpxor 16+8(%rsp),%xmm8,%xmm8 vpxor %xmm4,%xmm8,%xmm8 ret .cfi_endproc .size _aesni_ctr32_ghash_6x,.-_aesni_ctr32_ghash_6x .globl ring_core_0_17_14__aesni_gcm_decrypt .hidden ring_core_0_17_14__aesni_gcm_decrypt .type ring_core_0_17_14__aesni_gcm_decrypt,@function .align 32 ring_core_0_17_14__aesni_gcm_decrypt: .cfi_startproc xorq %rax,%rax cmpq $0x60,%rdx jb .Lgcm_dec_abort pushq %rbp .cfi_adjust_cfa_offset 8 .cfi_offset %rbp,-16 movq %rsp,%rbp .cfi_def_cfa_register %rbp pushq %rbx .cfi_offset %rbx,-24 pushq %r12 .cfi_offset %r12,-32 pushq %r13 .cfi_offset %r13,-40 pushq %r14 .cfi_offset %r14,-48 pushq %r15 .cfi_offset %r15,-56 vzeroupper movq 16(%rbp),%r12 vmovdqu (%r8),%xmm1 addq $-128,%rsp movl 12(%r8),%ebx leaq .Lbswap_mask(%rip),%r11 leaq -128(%rcx),%r14 movq $0xf80,%r15 vmovdqu (%r12),%xmm8 andq $-128,%rsp vmovdqu (%r11),%xmm0 leaq 128(%rcx),%rcx leaq 32(%r9),%r9 movl 240-128(%rcx),%r10d vpshufb %xmm0,%xmm8,%xmm8 andq %r15,%r14 andq %rsp,%r15 subq %r14,%r15 jc .Ldec_no_key_aliasing cmpq $768,%r15 jnc .Ldec_no_key_aliasing subq %r15,%rsp .Ldec_no_key_aliasing: vmovdqu 80(%rdi),%xmm7 movq %rdi,%r14 vmovdqu 64(%rdi),%xmm4 leaq -192(%rdi,%rdx,1),%r15 vmovdqu 48(%rdi),%xmm5 shrq $4,%rdx xorq %rax,%rax vmovdqu 32(%rdi),%xmm6 vpshufb %xmm0,%xmm7,%xmm7 vmovdqu 16(%rdi),%xmm2 vpshufb %xmm0,%xmm4,%xmm4 vmovdqu (%rdi),%xmm3 vpshufb %xmm0,%xmm5,%xmm5 vmovdqu %xmm4,48(%rsp) vpshufb %xmm0,%xmm6,%xmm6 vmovdqu %xmm5,64(%rsp) vpshufb %xmm0,%xmm2,%xmm2 vmovdqu %xmm6,80(%rsp) vpshufb %xmm0,%xmm3,%xmm3 vmovdqu %xmm2,96(%rsp) vmovdqu %xmm3,112(%rsp) call _aesni_ctr32_ghash_6x movq 16(%rbp),%r12 vmovups %xmm9,-96(%rsi) vmovups %xmm10,-80(%rsi) vmovups %xmm11,-64(%rsi) vmovups %xmm12,-48(%rsi) vmovups %xmm13,-32(%rsi) vmovups %xmm14,-16(%rsi) vpshufb (%r11),%xmm8,%xmm8 vmovdqu %xmm8,(%r12) vzeroupper leaq -40(%rbp),%rsp .cfi_def_cfa %rsp, 0x38 popq %r15 .cfi_adjust_cfa_offset -8 .cfi_restore %r15 popq %r14 .cfi_adjust_cfa_offset -8 .cfi_restore %r14 popq %r13 .cfi_adjust_cfa_offset -8 .cfi_restore %r13 popq %r12 .cfi_adjust_cfa_offset -8 .cfi_restore %r12 popq %rbx .cfi_adjust_cfa_offset -8 .cfi_restore %rbx popq %rbp .cfi_adjust_cfa_offset -8 .cfi_restore %rbp .Lgcm_dec_abort: ret .cfi_endproc .size ring_core_0_17_14__aesni_gcm_decrypt,.-ring_core_0_17_14__aesni_gcm_decrypt .type _aesni_ctr32_6x,@function .align 32 _aesni_ctr32_6x: .cfi_startproc vmovdqu 0-128(%rcx),%xmm4 vmovdqu 32(%r11),%xmm2 leaq -1(%r10),%r13 vmovups 16-128(%rcx),%xmm15 leaq 32-128(%rcx),%r12 vpxor %xmm4,%xmm1,%xmm9 addl $100663296,%ebx jc .Lhandle_ctr32_2 vpaddb %xmm2,%xmm1,%xmm10 vpaddb %xmm2,%xmm10,%xmm11 vpxor %xmm4,%xmm10,%xmm10 vpaddb %xmm2,%xmm11,%xmm12 vpxor %xmm4,%xmm11,%xmm11 vpaddb %xmm2,%xmm12,%xmm13 vpxor %xmm4,%xmm12,%xmm12 vpaddb %xmm2,%xmm13,%xmm14 vpxor %xmm4,%xmm13,%xmm13 vpaddb %xmm2,%xmm14,%xmm1 vpxor %xmm4,%xmm14,%xmm14 jmp .Loop_ctr32 .align 16 .Loop_ctr32: vaesenc %xmm15,%xmm9,%xmm9 vaesenc %xmm15,%xmm10,%xmm10 vaesenc %xmm15,%xmm11,%xmm11 vaesenc %xmm15,%xmm12,%xmm12 vaesenc %xmm15,%xmm13,%xmm13 vaesenc %xmm15,%xmm14,%xmm14 vmovups (%r12),%xmm15 leaq 16(%r12),%r12 decl %r13d jnz .Loop_ctr32 vmovdqu (%r12),%xmm3 vaesenc %xmm15,%xmm9,%xmm9 vpxor 0(%rdi),%xmm3,%xmm4 vaesenc %xmm15,%xmm10,%xmm10 vpxor 16(%rdi),%xmm3,%xmm5 vaesenc %xmm15,%xmm11,%xmm11 vpxor 32(%rdi),%xmm3,%xmm6 vaesenc %xmm15,%xmm12,%xmm12 vpxor 48(%rdi),%xmm3,%xmm8 vaesenc %xmm15,%xmm13,%xmm13 vpxor 64(%rdi),%xmm3,%xmm2 vaesenc %xmm15,%xmm14,%xmm14 vpxor 80(%rdi),%xmm3,%xmm3 leaq 96(%rdi),%rdi vaesenclast %xmm4,%xmm9,%xmm9 vaesenclast %xmm5,%xmm10,%xmm10 vaesenclast %xmm6,%xmm11,%xmm11 vaesenclast %xmm8,%xmm12,%xmm12 vaesenclast %xmm2,%xmm13,%xmm13 vaesenclast %xmm3,%xmm14,%xmm14 vmovups %xmm9,0(%rsi) vmovups %xmm10,16(%rsi) vmovups %xmm11,32(%rsi) vmovups %xmm12,48(%rsi) vmovups %xmm13,64(%rsi) vmovups %xmm14,80(%rsi) leaq 96(%rsi),%rsi ret .align 32 .Lhandle_ctr32_2: vpshufb %xmm0,%xmm1,%xmm6 vmovdqu 48(%r11),%xmm5 vpaddd 64(%r11),%xmm6,%xmm10 vpaddd %xmm5,%xmm6,%xmm11 vpaddd %xmm5,%xmm10,%xmm12 vpshufb %xmm0,%xmm10,%xmm10 vpaddd %xmm5,%xmm11,%xmm13 vpshufb %xmm0,%xmm11,%xmm11 vpxor %xmm4,%xmm10,%xmm10 vpaddd %xmm5,%xmm12,%xmm14 vpshufb %xmm0,%xmm12,%xmm12 vpxor %xmm4,%xmm11,%xmm11 vpaddd %xmm5,%xmm13,%xmm1 vpshufb %xmm0,%xmm13,%xmm13 vpxor %xmm4,%xmm12,%xmm12 vpshufb %xmm0,%xmm14,%xmm14 vpxor %xmm4,%xmm13,%xmm13 vpshufb %xmm0,%xmm1,%xmm1 vpxor %xmm4,%xmm14,%xmm14 jmp .Loop_ctr32 .cfi_endproc .size _aesni_ctr32_6x,.-_aesni_ctr32_6x .globl ring_core_0_17_14__aesni_gcm_encrypt .hidden ring_core_0_17_14__aesni_gcm_encrypt .type ring_core_0_17_14__aesni_gcm_encrypt,@function .align 32 ring_core_0_17_14__aesni_gcm_encrypt: .cfi_startproc xorq %rax,%rax cmpq $288,%rdx jb .Lgcm_enc_abort pushq %rbp .cfi_adjust_cfa_offset 8 .cfi_offset %rbp,-16 movq %rsp,%rbp .cfi_def_cfa_register %rbp pushq %rbx .cfi_offset %rbx,-24 pushq %r12 .cfi_offset %r12,-32 pushq %r13 .cfi_offset %r13,-40 pushq %r14 .cfi_offset %r14,-48 pushq %r15 .cfi_offset %r15,-56 vzeroupper vmovdqu (%r8),%xmm1 addq $-128,%rsp movl 12(%r8),%ebx leaq .Lbswap_mask(%rip),%r11 leaq -128(%rcx),%r14 movq $0xf80,%r15 leaq 128(%rcx),%rcx vmovdqu (%r11),%xmm0 andq $-128,%rsp movl 240-128(%rcx),%r10d andq %r15,%r14 andq %rsp,%r15 subq %r14,%r15 jc .Lenc_no_key_aliasing cmpq $768,%r15 jnc .Lenc_no_key_aliasing subq %r15,%rsp .Lenc_no_key_aliasing: movq %rsi,%r14 # 639 "/usr/local/cargo/registry/src/index.crates.io-1949cf8c6b5b557f/ring-0.17.14/pregenerated/aesni-gcm-x86_64-elf.S" leaq -192(%rsi,%rdx,1),%r15 shrq $4,%rdx call _aesni_ctr32_6x vpshufb %xmm0,%xmm9,%xmm8 vpshufb %xmm0,%xmm10,%xmm2 vmovdqu %xmm8,112(%rsp) vpshufb %xmm0,%xmm11,%xmm4 vmovdqu %xmm2,96(%rsp) vpshufb %xmm0,%xmm12,%xmm5 vmovdqu %xmm4,80(%rsp) vpshufb %xmm0,%xmm13,%xmm6 vmovdqu %xmm5,64(%rsp) vpshufb %xmm0,%xmm14,%xmm7 vmovdqu %xmm6,48(%rsp) call _aesni_ctr32_6x movq 16(%rbp),%r12 leaq 32(%r9),%r9 vmovdqu (%r12),%xmm8 subq $12,%rdx movq $192,%rax vpshufb %xmm0,%xmm8,%xmm8 call _aesni_ctr32_ghash_6x vmovdqu 32(%rsp),%xmm7 vmovdqu (%r11),%xmm0 vmovdqu 0-32(%r9),%xmm3 vpunpckhqdq %xmm7,%xmm7,%xmm1 vmovdqu 32-32(%r9),%xmm15 vmovups %xmm9,-96(%rsi) vpshufb %xmm0,%xmm9,%xmm9 vpxor %xmm7,%xmm1,%xmm1 vmovups %xmm10,-80(%rsi) vpshufb %xmm0,%xmm10,%xmm10 vmovups %xmm11,-64(%rsi) vpshufb %xmm0,%xmm11,%xmm11 vmovups %xmm12,-48(%rsi) vpshufb %xmm0,%xmm12,%xmm12 vmovups %xmm13,-32(%rsi) vpshufb %xmm0,%xmm13,%xmm13 vmovups %xmm14,-16(%rsi) vpshufb %xmm0,%xmm14,%xmm14 vmovdqu %xmm9,16(%rsp) vmovdqu 48(%rsp),%xmm6 vmovdqu 16-32(%r9),%xmm0 vpunpckhqdq %xmm6,%xmm6,%xmm2 vpclmulqdq $0x00,%xmm3,%xmm7,%xmm5 vpxor %xmm6,%xmm2,%xmm2 vpclmulqdq $0x11,%xmm3,%xmm7,%xmm7 vpclmulqdq $0x00,%xmm15,%xmm1,%xmm1 vmovdqu 64(%rsp),%xmm9 vpclmulqdq $0x00,%xmm0,%xmm6,%xmm4 vmovdqu 48-32(%r9),%xmm3 vpxor %xmm5,%xmm4,%xmm4 vpunpckhqdq %xmm9,%xmm9,%xmm5 vpclmulqdq $0x11,%xmm0,%xmm6,%xmm6 vpxor %xmm9,%xmm5,%xmm5 vpxor %xmm7,%xmm6,%xmm6 vpclmulqdq $0x10,%xmm15,%xmm2,%xmm2 vmovdqu 80-32(%r9),%xmm15 vpxor %xmm1,%xmm2,%xmm2 vmovdqu 80(%rsp),%xmm1 vpclmulqdq $0x00,%xmm3,%xmm9,%xmm7 vmovdqu 64-32(%r9),%xmm0 vpxor %xmm4,%xmm7,%xmm7 vpunpckhqdq %xmm1,%xmm1,%xmm4 vpclmulqdq $0x11,%xmm3,%xmm9,%xmm9 vpxor %xmm1,%xmm4,%xmm4 vpxor %xmm6,%xmm9,%xmm9 vpclmulqdq $0x00,%xmm15,%xmm5,%xmm5 vpxor %xmm2,%xmm5,%xmm5 vmovdqu 96(%rsp),%xmm2 vpclmulqdq $0x00,%xmm0,%xmm1,%xmm6 vmovdqu 96-32(%r9),%xmm3 vpxor %xmm7,%xmm6,%xmm6 vpunpckhqdq %xmm2,%xmm2,%xmm7 vpclmulqdq $0x11,%xmm0,%xmm1,%xmm1 vpxor %xmm2,%xmm7,%xmm7 vpxor %xmm9,%xmm1,%xmm1 vpclmulqdq $0x10,%xmm15,%xmm4,%xmm4 vmovdqu 128-32(%r9),%xmm15 vpxor %xmm5,%xmm4,%xmm4 vpxor 112(%rsp),%xmm8,%xmm8 vpclmulqdq $0x00,%xmm3,%xmm2,%xmm5 vmovdqu 112-32(%r9),%xmm0 vpunpckhqdq %xmm8,%xmm8,%xmm9 vpxor %xmm6,%xmm5,%xmm5 vpclmulqdq $0x11,%xmm3,%xmm2,%xmm2 vpxor %xmm8,%xmm9,%xmm9 vpxor %xmm1,%xmm2,%xmm2 vpclmulqdq $0x00,%xmm15,%xmm7,%xmm7 vpxor %xmm4,%xmm7,%xmm4 vpclmulqdq $0x00,%xmm0,%xmm8,%xmm6 vmovdqu 0-32(%r9),%xmm3 vpunpckhqdq %xmm14,%xmm14,%xmm1 vpclmulqdq $0x11,%xmm0,%xmm8,%xmm8 vpxor %xmm14,%xmm1,%xmm1 vpxor %xmm5,%xmm6,%xmm5 vpclmulqdq $0x10,%xmm15,%xmm9,%xmm9 vmovdqu 32-32(%r9),%xmm15 vpxor %xmm2,%xmm8,%xmm7 vpxor %xmm4,%xmm9,%xmm6 vmovdqu 16-32(%r9),%xmm0 vpxor %xmm5,%xmm7,%xmm9 vpclmulqdq $0x00,%xmm3,%xmm14,%xmm4 vpxor %xmm9,%xmm6,%xmm6 vpunpckhqdq %xmm13,%xmm13,%xmm2 vpclmulqdq $0x11,%xmm3,%xmm14,%xmm14 vpxor %xmm13,%xmm2,%xmm2 vpslldq $8,%xmm6,%xmm9 vpclmulqdq $0x00,%xmm15,%xmm1,%xmm1 vpxor %xmm9,%xmm5,%xmm8 vpsrldq $8,%xmm6,%xmm6 vpxor %xmm6,%xmm7,%xmm7 vpclmulqdq $0x00,%xmm0,%xmm13,%xmm5 vmovdqu 48-32(%r9),%xmm3 vpxor %xmm4,%xmm5,%xmm5 vpunpckhqdq %xmm12,%xmm12,%xmm9 vpclmulqdq $0x11,%xmm0,%xmm13,%xmm13 vpxor %xmm12,%xmm9,%xmm9 vpxor %xmm14,%xmm13,%xmm13 vpalignr $8,%xmm8,%xmm8,%xmm14 vpclmulqdq $0x10,%xmm15,%xmm2,%xmm2 vmovdqu 80-32(%r9),%xmm15 vpxor %xmm1,%xmm2,%xmm2 vpclmulqdq $0x00,%xmm3,%xmm12,%xmm4 vmovdqu 64-32(%r9),%xmm0 vpxor %xmm5,%xmm4,%xmm4 vpunpckhqdq %xmm11,%xmm11,%xmm1 vpclmulqdq $0x11,%xmm3,%xmm12,%xmm12 vpxor %xmm11,%xmm1,%xmm1 vpxor %xmm13,%xmm12,%xmm12 vxorps 16(%rsp),%xmm7,%xmm7 vpclmulqdq $0x00,%xmm15,%xmm9,%xmm9 vpxor %xmm2,%xmm9,%xmm9 vpclmulqdq $0x10,16(%r11),%xmm8,%xmm8 vxorps %xmm14,%xmm8,%xmm8 vpclmulqdq $0x00,%xmm0,%xmm11,%xmm5 vmovdqu 96-32(%r9),%xmm3 vpxor %xmm4,%xmm5,%xmm5 vpunpckhqdq %xmm10,%xmm10,%xmm2 vpclmulqdq $0x11,%xmm0,%xmm11,%xmm11 vpxor %xmm10,%xmm2,%xmm2 vpalignr $8,%xmm8,%xmm8,%xmm14 vpxor %xmm12,%xmm11,%xmm11 vpclmulqdq $0x10,%xmm15,%xmm1,%xmm1 vmovdqu 128-32(%r9),%xmm15 vpxor %xmm9,%xmm1,%xmm1 vxorps %xmm7,%xmm14,%xmm14 vpclmulqdq $0x10,16(%r11),%xmm8,%xmm8 vxorps %xmm14,%xmm8,%xmm8 vpclmulqdq $0x00,%xmm3,%xmm10,%xmm4 vmovdqu 112-32(%r9),%xmm0 vpxor %xmm5,%xmm4,%xmm4 vpunpckhqdq %xmm8,%xmm8,%xmm9 vpclmulqdq $0x11,%xmm3,%xmm10,%xmm10 vpxor %xmm8,%xmm9,%xmm9 vpxor %xmm11,%xmm10,%xmm10 vpclmulqdq $0x00,%xmm15,%xmm2,%xmm2 vpxor %xmm1,%xmm2,%xmm2 vpclmulqdq $0x00,%xmm0,%xmm8,%xmm5 vpclmulqdq $0x11,%xmm0,%xmm8,%xmm7 vpxor %xmm4,%xmm5,%xmm5 vpclmulqdq $0x10,%xmm15,%xmm9,%xmm6 vpxor %xmm10,%xmm7,%xmm7 vpxor %xmm2,%xmm6,%xmm6 vpxor %xmm5,%xmm7,%xmm4 vpxor %xmm4,%xmm6,%xmm6 vpslldq $8,%xmm6,%xmm1 vmovdqu 16(%r11),%xmm3 vpsrldq $8,%xmm6,%xmm6 vpxor %xmm1,%xmm5,%xmm8 vpxor %xmm6,%xmm7,%xmm7 vpalignr $8,%xmm8,%xmm8,%xmm2 vpclmulqdq $0x10,%xmm3,%xmm8,%xmm8 vpxor %xmm2,%xmm8,%xmm8 vpalignr $8,%xmm8,%xmm8,%xmm2 vpclmulqdq $0x10,%xmm3,%xmm8,%xmm8 vpxor %xmm7,%xmm2,%xmm2 vpxor %xmm2,%xmm8,%xmm8 movq 16(%rbp),%r12 vpshufb (%r11),%xmm8,%xmm8 vmovdqu %xmm8,(%r12) vzeroupper leaq -40(%rbp),%rsp .cfi_def_cfa %rsp, 0x38 popq %r15 .cfi_adjust_cfa_offset -8 .cfi_restore %r15 popq %r14 .cfi_adjust_cfa_offset -8 .cfi_restore %r14 popq %r13 .cfi_adjust_cfa_offset -8 .cfi_restore %r13 popq %r12 .cfi_adjust_cfa_offset -8 .cfi_restore %r12 popq %rbx .cfi_adjust_cfa_offset -8 .cfi_restore %rbx popq %rbp .cfi_adjust_cfa_offset -8 .cfi_restore %rbp .Lgcm_enc_abort: ret .cfi_endproc .size ring_core_0_17_14__aesni_gcm_encrypt,.-ring_core_0_17_14__aesni_gcm_encrypt .section .rodata .align 64 .Lbswap_mask: .byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0 .Lpoly: .byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2 .Lone_msb: .byte 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 .Ltwo_lsb: .byte 2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 .Lone_lsb: .byte 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 .byte 65,69,83,45,78,73,32,71,67,77,32,109,111,100,117,108,101,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 .align 64 .text